DFTS 2018: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Chicago, IL, United States, October 8-10, 2018 |
Conference website | http://www.dfts.org/ |
Submission link | https://easychair.org/conferences/?conf=dfts2018 |
Submission deadline | April 28, 2018 |
Notification of Acceptance | July 1, 2018 |
Camera ready and author's registration | July 21, 2018 |
Call for Papers
DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies. One of the unique features of this symposium is to combine new academic research with state-of-the-art industrial data, necessary ingredients for significant advances in this field. All aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation are of interest. Topics include (but are not limited to) the following:
1. Yield Analysis and Modeling: Defect/fault analysis and models; statistical yield model-ing; diagnosis; critical area and other metrics. 2. Testing Techniques: Built-in self-test; delay fault modeling and diagnosis; testing for analog and mixed circuits; online testing; signal and clock integrity. 3. Design for Testability in IC Design: FPGA, SoC, NoC, ASIC, low power design and microprocessors. 4. Error Detection, Correction, and Recove-ry: Self-testing and self-checking solutions; error-control coding; fault masking and avoid-ance; recovery schemes, space/time redun-dancy; hw/sw techniques; architectural-specif-ic techniques, system-level design-time or runtime strategies. 5. Dependability Analysis and Validation: Fault injection techniques and frameworks; dependability and characterization. 6. Repair, Restructuring and Reconfigura-tion: Repairable logic; reconfigurable circuit design; DFT for on-line operation; self-healing; reliable FPGA-based systems. |
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7. Defect and Fault Tolerance: Reliable circuit/system synthesis; radiation hardened and/or tolerant processes and design; design space exploration for dependable systems, transient/soft faults and errors. 8. Aging and Lifetime Reliability: Aging char-acterization and modeling; design and run-time reliability, thermal, and variability management and recovery. 9. Dependable Applications and Case Studies: Methodologies and case study appli-cations to Internet of Things, automotive, rail-way, avionics and space, autonomous systems, industrial control, etc. 9. Emerging Technologies: Techniques for 2.5D/3D ICs, quantum computing architecttures, memristors, spintronics, microfluidics, etc 10. Design for Security: Fault attacks, fault tolerance-based counter-measures, Scan-based attacks and counter-measures, hardware trojans, security vs. reliability trade-offs, interaction between VLSI test, trust, and reliability. |
Paper Submission: Prospective authors are invited to submit original and unpublished contributions. Two types of submissions are possible: (i) regular papers (6 pages), and (ii) short papers (4 pages). Both types will be included in the symposium proceedings and should adhere to the IEEE conference template, 2-columns style (available on conference web site), and submitted as a PDF file, electronically. Please refer to the symposium web page for updated information.
Call for Special Sessions: Proposals for Special Sessions are also invited. For more information, visit symposium website and see the specific call.
Paper Publication: Only original, unpublished work will be accepted, for regular or short presentation at the symposium. Proceedings will be published by the IEEE Computer Society and will appear in the Digital Library. All papers will be considered for the DFT 2018 Best Paper Award. Furthermore, selected papers will be considered for a special issue/section of an archival journal.
Author Registration: Every accepted paper MUST have at least one full paid registration by the time the camera-ready paper is submitted for inclusion in the proceedings, and one of the authors is expected to attend the Symposium and present the paper.
Venue: The symposium is going back to North America on its 31st edition and will take place in the USA at the Wyndam Grant Hotel, Chicago Waterfront, on the south end of the Magnificent mile, on Chicago river, at a very short walk to the Millennium Park, the Art Institute of Chicago and other attractions. The Chicago metropolitan area has nearly 10 million people and is the third-largest in the United States. Chicago has often been called a global architecture capital and is considered one of the most important business centers in the world.
Prospective authors should adhere to the following deadlines:
Paper submission: April 28, 2018
Notification of acceptance: July 1, 2018
Camera ready and author’s registration: July 21, 2018