IEEE ASYNC 2023: The 28th IEEE International Symposium on Asynchronous Circuits and Systems Beijing, China, July 16-19, 2023 |
Conference website | https://www.async2023.org/ |
Submission link | https://easychair.org/conferences/?conf=ieeeasync2023 |
Abstract registration deadline | March 14, 2023 |
Submission deadline | March 14, 2023 |
Regular Papers Notification of Acceptance | April 18, 2023 |
Industrial Papers (Tool & Demos) Fresh Idea Papers Posters Submission | April 30, 2023 |
Regular Papers Final Version | May 9, 2023 |
Industrial Papers (Tool & Demos) Fresh Idea Papers Posters Notification of Acceptance | May 14, 2023 |
Industrial Papers (Tool & Demos) Fresh Idea Papers Posters Final Version | May 28, 2023 |
The International Symposium on Asynchronous Circuits and Systems (ASYNC) is the premier forum for researchers and Industry to present their latest insights and results in asynchronous VLSI computing. Asynchronous computations are at the heart of recent deep learning and neuromorphic designs and well-suited for distributed tasks in high-performance low-energy processing and communication.
The 28th IEEE International Symposium on Asynchronous Circuits and Systems (IEEE ASYNC 2023) will be held during July 16-19, 2023 in Beijing, China, which is organized by Tsinghua University, China.
Authors are invited to submit papers on any aspect of asynchronous design, ranging from design, synthesis, and test to asynchronous applications.
Submission Guidelines
Paper Format and Submission:
We invite you to submit 6-10 page regular papers or 4-page regular short papers with original scientific work relevant to ASYNC, in IEEE conference format (double-column, 10pt or larger). Accepted papers must be presented and will be published in the Symposium Proceedings and the IEEE Xplore Digital Library.
"Fresh Ideas" / Posters:
We solicit 1-2 page submissions that present "fresh ideas" in asynchronous design, not yet ready for publication. These will go through a separate light-weight review process. Accepted submissions will be assembled in a binder and handed out at the workshop. We also invite students to present a poster on their research, co-authored with their advisor, and to submit a 1 page abstract that will receive a light-weight review.
Industrial Papers / Tools & Demos:
ASYNC 2023 will include papers and tutorials from industry on the state-of-the-art application of asynchronous designs to both existing and emerging technologies. The topics are specifically targeted at industry and include:
- Synchronizers and clock domain crossing techniques;
- Techniques for combining asynchronous and clocked designs;
- CAD tools for integrating asynchronous circuits with clocked designs;
- Circuit designs, case studies, comparisons, and applications;
We solicit 1-2 page submissions for the workshop, IEEE double-column conference format. These papers will go through a separate light-weight review process. Accepted papers will be published in the IEEE digital library IEEEXplore and symposium proceedings. We also solicit tools and demos for presentation at the conference.
List of Topics
- Asynchronous pipelines, architectures, CPUs, and memories;
- Asynchronous ultra-low power systems, energy harvesting, and mixed-signal/analogue;
- Asynchrony in emerging technologies, including bio, neural, nano, and quantum computing;
- CAD tools for asynchronous design, synthesis, analysis, and optimization;
- Formal methods for verification and performance/power analysis;
- Test, security, fault tolerance, and radiation hard design;
- Asynchronous variability-tolerant design, resilient design, and design for manufacturing;
- Asynchronous design for neural networks and machine learning applications;
- Circuit designs, case studies, comparisons, and applications;
- Mixed-timed circuits, clock domain crossing, GALS systems, Network-on-Chip, and multi-chip interconnects;
- Hardware implementations of asynchronous models and algorithms, asynchronous techniques in clocked designs, and elastic and latency-tolerant synchronous design;
- Circuit designs, case studies, comparisons, and applications.
Committees
General Chair
Hong CHEN, Tsinghua University, Beijing, China
General Co-Chair
Giacomo INDIVERI, University of Zurich and ETH Zurich, Switzerland
Honorary Chair
Shaojun WEI, Tsinghua University, China
Program Co-Chairs
Laurent FESQUET, Grenoble Institute of Technology, France
Jia DI, University of Arkansas, USA
Special Session Chair
Davide BERTOZZI, University of Ferrara, Italy
Industrial Liaison Chairs
Prasad JOSHI, Intel, USA
Ning QIAO, SynSense, China
Publicity Chairs
Delong SHANG, Institute of Microelectronics, Chinese Academy of Sciences, China
Kshitij BHARDWAJ, Lawrence Livermore National Laboratory, USA
Tutorial Chair
Anping HE, Lanzhou University, China
Finance Chair
Ziqiang WANG, Tsinghua University, China
Contact
Conference General Query:Yuer Peng
Tel: 19182240053
Email: async2023@youngac.cn