MOS-AK India 2019: IEEE International Conference on Modeling of Systems Circuits and Devices IIT Hyderabad Hyderabad, India, February 25-27, 2019 |
Conference website | http://www.mos-ak.org/india_2019/ |
Abstract registration deadline | November 30, 2018 |
Submission deadline | January 3, 2019 |
MOS-AK is an international established HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models. The main aim of the conference is to strengthen the network among experts in the field by serving as an open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bringing people in the compact modeling field together, as well as obtaining feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the main theme - frontiers of the compact modeling for nm-scale MEMS designs and CMOS/SOI circuit simulation.
The specific MOS-AK India 2019 R&D goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains. This conference is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/Analog/Mixed-Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers. The content will be beneficial for anyone who needs to learn what is really behind IC simulation and modern device models.
Submission Guidelines
Original unpublished works in topics related to the following areas (but not limited to) can be submitted for publication. The proceedings of the conference will be submitted to IEEE Explore. Best Paper Award: Gold leaf, Silver leaf and Bronze leaf certificates will be given to best papers.
Compact Modeling Track | Circuits and Systems Track |
•Advances in semiconductor technologies
and processing •Compact Modeling (CM) of the electron devices
•Verilog-A language for CM standardization
•New CM techniques and extraction software
•FOSS TCAD/EDA modeling and simulation
•CM of passive, active, sensors and actuators
•Emerging Devices, TFT CMOS and SOI-based memory cells
•Organic, Bio/Med devices/technology modeling
•Microwave, RF, HV/Power device modeling
•Nanoscale CMOS devices and circuits
•Technology R&D reliability/ageing, DFY, DFT
and IC Designs •Foundry/Fabless Interface Strategies
|
•Analog Circuits
•Biomedical and Life-Science Circuits, Systems and Applications
•Circuits and Systems for Communication
•Emerging Technologies for Circuits and Systems
•HP/HV IC Designs
•Memory Circuits and Systems
•Mixed Signal Circuits
•RF/mm-Wave IC Design and Technology
•Sensory Systems System-on-Chip and CAD
•Testing Technology
•VLSI Systems & Applications
•And any other IC design related topic
|
Committees
Steering Committee
- Ehrenfried Seebacher, ams (A)
- A.B. Bhattacharyya, FNA,FNAE
- M.J. Zarabi, Retd. Director, SCL, India
- M.K. Radhakrishnan, Chair, IEEE EDS, Asia Pacific
- U.B. Desai, Director, IITH
- Anilkumar Muniswamy, Chair, IESA
- Sebastien Hug, Consul General and CEO, swissnex
- V. Hanuma Sai, AMS Semiconductors Pvt. Ltd.
- Rajeev Joshi, IBM, USA
- Ramgopal Rao, IITD, Delhi
- Navkanth Bhat, IISc , Bangalore
- Yogesh Chauhan, IIT, Kanpur
- Santanu Mahapatra, IISc, Bangalore
- Vipin Mandangarli, Global Foundries
- Venkatnarayan Hariharan, Intel Bangalore
- C.P. Ravikumar, Texas Instruments
- PVS Maruthi Rao, IEEE Hyderabad Section
- Abha Jain, Cadence
- Merugu Lakshminarayana, IEEE Hyderabad Section
Organizing committee
- General Co-Chairs
- Wladek Grabinski, MOS-AK (EU)
- PA Govindacharyulu, IEEE CAS/EDS, Hyderabad Section
- Organizing Co-Chairs
- Sushmee Badhulika, IITH
- A.G. Krishnakanth, AMS Semiconductors Pvt. Ltd.
- TPC Co-Chairs
- PV Anand Mohan, IEEE CAS, Bangalore Section
- N Venkatesh, Redpine Signals
- Publication Co-Chairs
- Asudeb Dutta, IITH
- Wladek Grabinski, MOS-AK (EU)
- Finance Chair
- Arif Sohel, IEEE CAS/EDS, Hyderabad Section
- Tutorial Co-Chairs
- Kaleem Fatima, IEEE CAS/EDS, Hyderabad Section
- Ghanshyam Krishna, University of Hyderabad
- Publicity Co-Chairs
- Anurag Mangla, ams (A)
- P. Chandrasekhar, IEEE CAS/EDS, Hyderabad Section
- Industry Liaison Co-Chair
- Sabat L Samrat, University of Hyderabad
- Vijaya Shankar Rao, University of Hyderabad
- Sponsorships Co-Chair
- Avinash Yadlapati, Mirafra Technologies
- Local Arrangement Co-Chair
- Gajendranath M.A. Raheem, IEEE CAS/EDS, Hyderabad Section
Important Dates:
Call for Papers and Tutorials: 1 September 2018
Paper and Tutorial Submission Deadline: 30 November 2018
Notification of Acceptance: 30 December 2018
Registration and Camera Ready Paper submission: 10 January 2019
Release of Conference Program: 15 January 2018
Conference Dates: 25-27 February 2019
Submission Details: https://easychair.org/
Conference Website: http://www.mos-ak.org/india_2019/
Conference email: secretary.mosak.india@gmail.com