SLIP'2019: ACM/IEEE System Level Interconnect Prediction Las Vegas Convention Center Las Vegas, NE, United States, June 2, 2019 |
Conference website | http://www.sliponline.org/ |
Submission link | https://easychair.org/conferences/?conf=slip2019 |
Abstract registration deadline | March 22, 2019 |
Submission deadline | March 29, 2019 |
The ever-increasing complexity of modern networks shifts the design focus towards the interconnect driven challenges across all the levels of design abstraction. Advancements in design and prediction of highly interconnected systems are critical to markets such as intelligent autonomous transportation, innovative health care, sophisticated security systems, artificial bio-inspired networks, Internet of Things, and high-performance computing. The IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP) is co-located with DAC 2019 and is a unique opportunity to engage with experts from academia, industry, and government, specializing in a broad scope of interconnect prediction techniques, from applications to architectural and micro-architectural exploration to physical design, interconnect technology planning, and communication networks. Keynote talk will be given by Prof. Andrew B. Kahng, UC San Diego. In addition to the presentation of state-of-the-art papers in these fields, invited talks and panels by leading researchers will aim to encourage dialogue between the architecture, physical design, and interconnect technology communities.
Submission Guidelines
Submissions should contain significant novel ideas and technical results that have not been published or concurrently submitted to any other venue. Submitted manuscripts of 4 to 8 pages should be written in English conforming to the ACM or IEEE conference proceedings format (double-columned, 9pt or 10pt font, 8.5”x11” page size). All paper submissions must represent original and unpublished work. To permit double blind review, all papers must remove author information (submissions with author information will be rejected). Papers must be submitted electronically as PDF files through EasyChair website: https://easychair.org/conferences/?conf=slip2019.
List of Topics
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Learning and predictive models for optimizing interconnect
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System-level design for FPGAs, NoCs, reconfigurable systems
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Design, analysis, and (co)optimization of power and clock networks
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Topologies and fabrics of multi- and many-core architectures
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Power consumption of interconnects
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System level reliability, aging, and thermal issues
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Security-aware power/clock delivery and interconnect design
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Design-for-manufacturing (DFM) and yield techniques for interconnects
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High speed chip-to-chip interconnect
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Design and analysis of chip-package interfaces
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3D interconnect design and prediction
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Applications of interconnects to social, genetic, and biological systems
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Bio-inspired connectionist systems, such as artificial neural networks
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Other complex networks and high-performance computing
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Emerging interconnect technologies in machine learning platforms & chips
Committee
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General Chair: Selçuk Köse, University of Rochester, USA
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Technical Program Chair: Inna P.-Vaisband, University of Illinois at Chicago, USA
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Technical Program Co-Chair: Mingsong Chen, East China Normal University, China
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Finance Chair: Weize Yu, Old Dominion University, USA
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Publicity Chairs: Ming-Chang Yang, Chinese University of Hong Kong, Hong Kong
Boris Vaisband, University of California, Los Angeles, USA -
Panel Chair: Shantanu Dutt, University of Illinois at Chicago, USA
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Publications Chair: Junlong Zhou, Nanjing University of Science and Technology, China
Venue
Las Vegas Convention Center, Nevada, United States.
Contact
All questions about submissions should be emailed to Selcuk Kose at selcuk.kose@rochester.edu and/or Inna Partin-Vaisband at vaisband@uic.edu
Sponsors
ACM SIGDA and the IEEE Computer Society