DVCon Taiwan 2025: DVCon Taiwan 2025 Hsinchu Lakeshore Hotel Hsinchu, Taiwan, September 9, 2025

The Design and Verification Conference & Exhibition Taiwan (DVCon Taiwan) is the premier Taiwan technical conference on system, software, design, verification, validation, and integration. It is a place where the latest methodologies and technologies of tools, languages, and standards for integrated and embedded systems and products are shared and discussed. Applications of interest include (but are not limited to) edge computing, mobile communication, drones, automotive, charging stations, computing farms, advanced packaging, and consumer electronics. DVCon Taiwan solicits submissions related to industrial applications or research in design and verification. Special interest areas are Digital Twin, Internet-of-Things, advanced IC packaging, Functional Safety and Security, Artificial Intelligence and Machine Learning, ADAS, and Digitalization. DVCon Taiwan 2025 seeks submissions of engineering and tutorials with highly technical content reflecting real-life experiences and research topics. The following are example topics.

Example Topics

The DVCon Taiwan Steering Committee invites submissions of papers and presentations on practical experiences and novel applications of standards in various areas. Submissions on topics in the following areas are encouraged but not limited to:

• SYSTEM-LEVEL AND SOFTWARE
  • Virtual prototyping and platforms 
  • Transaction-level modelling (e.g., SystemC TLM)
  • Hardware-assisted prototyping
  • Machine Learning for Software design and verification
  • Platforms for AI acceleration
  • High-level synthesis from ESL languages such as SystemC, SystemVerilog, and e 
• VERIFICATION & VALIDATION
  • Verification process, reuse, and resource management
  • Methods bridging between verification and validation
  • AI-assisted software/hardware co-verification and co-emulation
  • Advanced methodologies, test benches, and flows (e.g., UVM, PSS)
  • Formal and semi-formal V&V techniques
• FUNCTIONAL SAFETY AND SECURITY
  • Functional safety standard compliance (e.g., ISO 26262) 
  • Safety and security in verification and validation (e.g., ISO 21434) 
  • Requirements-driven design and verification, including traceability 
  • New methods supporting functional safety, security, and reliability
• AI/ML AND BIG DATA
  • Automating the Optimization of Verification / Implementation Processes 
  • Coverage metrics and data analysis 
  • Performance modeling and/or analysis
• MODEL-BASED SYSTEMS ENGINEERING
  • Modeling for Digital Twins and Digital Thread 
  • Software for development and test automation 
  • Model-based methodologies, tools, and techniques 
  • Modeling languages (e.g. SysMLv2) 
  • Interoperability of models and/or tools (e.g. FSS) 
  • Hardware/software/embedded co-design 
• IP REUSE & DESIGN AUTOMATION
  • IP tagging, protection, or security 
  • SoC and IP integration methods, flows, and tools 
  • Configuration management of IPs, including different abstraction level 
  • Flow and tool automation (e.g., IP-XACT) 
•  MIXED-SIGNAL AND LOW-POWER DESIGN AND VERIFICATION
  • AMS modeling for concept and system-level design 
  • Application of mixed-signal extensions in verification (e.g., UVM-MS) 
  • Real-number modeling approaches 
  • Self-checking test benches in analog verification 
  • Low-power design and verification (e.g., UPF) 
• PROCESSOR ECOSYSTEM DEVELOPMENTS
  • RISC-V and other open-source architectures 
  • Quantum computing 
  • Ecosystems for Processor-based architectures

SUBMISSION GUIDELINES

DVCon Taiwan has adopted the following process to reduce the time and effort required to prepare for the submission of papers.

• We accept submissions in the form of a short paper (2-6 pages) or slides (6-page slides plus a 100-word abstract).
• Please use English.
• The abstract should provide enough details so that the Technical Program Committee can evaluate the potential quality of your completed paper and the interest of the DVCon Taiwan attendees in your presentation.
• Presentation time at the conference will be 30 minutes, including Q&A.
• Corporate logos may only be included on the title slide of the presentation.
• Please use the templates provided for both papers and slides.

Please visit https://dvcontaiwan.org/author-2025/ for templates.

Submission Process and Deadlines

• April 15th, 2025 — Abstract Submission Deadline
• June 28th, 2025 — Notification of Preliminary Acceptance / Rejection
• July 25th, 2025 — Draft Paper Submission
• August 25th, 2025 — Final Paper, Presentation Slides, and Copyright Form Due
• September 9, 2025 — DVCon Taiwan 2025 Event Date

Committees

https://dvcontaiwan.org/conference/steering-committee/

Venue

Hsinchu Lakeshore Hotel

https://dvcontaiwan.org/conference-2024/venue-2025/

Contact

All questions about submissions should be emailed to dvcon.tw@gmail.com